发明名称 THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE INCLUDING THE SAME
摘要 A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, and source and drain electrodes insulated from the gate electrode and partially connected to the semiconductor layer, wherein the semiconductor layer is formed from a polycrystalline silicon layer crystallized by a metal catalyst and the metal catalyst is removed by gettering using an etchant. In addition, the OLED display device includes an insulating layer disposed on the entire surface of the substrate, a first electrode disposed on the insulating layer and electrically connected to one of the source and drain electrodes, an organic layer, and a second electrode.
申请公布号 US2014363936(A1) 申请公布日期 2014.12.11
申请号 US201414303233 申请日期 2014.06.12
申请人 Samsung Display Co., Ltd. 发明人 Park Byoung-Keon;Yang Tae-Hoon;Seo Jin-Wook;Lee Ki-Yong;Lisachenko Maxim;Choi Bo-Kyung;Lee Dae-Woo;Lee Kil-Won;Lee Dong-Hyun;Park Jong-Ryuk;Ahn Ji-Su;Kim Young-Dae;Na Heung-Yeol;Jeong Min-Jae;Chung Yun-Mo;Hong Jong-Won;Kang Eu-Gene;Chang Seok-RaK;Jung Jae-Wan;Yoon Sang-Yon
分类号 H01L29/66;H01L21/02 主分类号 H01L29/66
代理机构 代理人
主权项 1. A method of fabricating a thin film transistor, comprising: forming a buffer layer on a substrate; forming an amorphous silicon layer on the buffer layer; forming a metal catalyst layer on the amorphous silicon layer; crystallizing the amorphous silicon layer into a polycrystalline silicon layer by annealing the substrate; removing the metal catalyst layer; etching the polycrystalline silicon layer using an etchant; forming a semiconductor layer by patterning the polycrystalline silicon layer; forming a gate insulating layer on the semiconductor layer; forming a gate electrode on the gate insulating layer; forming an interlayer insulating layer on the entire surface of the substrate; and forming source and drain electrodes on the interlayer insulating layer to be partially connected to the semiconductor layer.
地址 Yongin-city KR