发明名称 |
STACKED WAFER STRUCTURE AND FABRICATING METHOD THEREOF |
摘要 |
A stacked wafer structure includes a CIS wafer, an ISP wafer, a lamination layer, a through silicon via and a pixel device. The CIS wafer bonds to the ISP wafer through the lamination layer. The pixel device is disposed on the CIS wafer. The through silicon via penetrates either the CIS wafer or the ISP wafer to connect devices in CIS wafer to the devices in ISP wafer electrically. |
申请公布号 |
US2014361347(A1) |
申请公布日期 |
2014.12.11 |
申请号 |
US201313914612 |
申请日期 |
2013.06.10 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
Kao Ching-Hung |
分类号 |
H01L27/148;H01L27/146 |
主分类号 |
H01L27/148 |
代理机构 |
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代理人 |
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主权项 |
1. A stacked wafer structure, comprising:
a CIS wafer comprising:
a CIS substrate having a front side and a back side opposing to the front side;a first dielectric layer disposed on the front side of the CIS substrate; andat least one set of first conductive stack disposed within the first dielectric layer; an ISP wafer comprising:
an ISP substrate;a second dielectric layer disposed on the ISP substrate;at least one set of second conductive stack disposed within the second dielectric layer; andat least one active device disposed on the ISP substrate; a lamination layer disposed between the first dielectric layer and the second dielectric layer so as to bond the CIS wafer to the ISP wafer; a through silicon via penetrating the CIS wafer and the lamination layer so as to electrically connects the first conductive stack to the second conductive stack; and a pixel device disposed on the back side of the CIS substrate. |
地址 |
Hsin-Chu City TW |