| 摘要 |
A memory cell (10) for storing one or more bits of information has a control gate (24), a source terminal (12) and a drain terminal (14). A semiconductor substrate (16) is located between the source (12) and drain (14) terminals, and a floating gate (26) is disposed between the control gate (24) and the semiconductor substrate (16). The floating gate (26) is electrically isolated from the control gate (24) by a charge trapping barrier (30), and is electrically isolated from the semiconductor substrate (16) by a charge blocking barrier (28). At least one of the charge trapping barrier (30) and the charge blocking barrier (28) contains a III-V semiconductor material. The charge trapping barrier (30) is adapted to enable the selective passage of charge carriers between the control gate (24) and the floating gate (26), in use, to modify the one or more bits of information stored by the memory cell (10). |
