发明名称 半導体装置及び半導体装置の製造方法
摘要 <p>A semiconductor device includes: a multilayer wiring layer located over a substrate and in which multiple wiring layers configured by a wiring and an insulating layer are stacked; a memory circuit which is formed in a memory circuit region in the substrate and has a capacitance element embedded in a concave part located in the multilayer wiring layer; a logic circuit which is formed in a logic circuit region in the substrate; an upper part coupling wiring which is stacked over the capacitance element configured by a lower part electrode, a capacitor insulating film and an upper part electrode; and a cap layer which is formed on the upper surface of the wiring configuring the logic circuit. The upper surface of the upper part coupling wiring and the upper surface of the cap film are provided on the same plane.</p>
申请公布号 JP5638408(B2) 申请公布日期 2014.12.10
申请号 JP20110017238 申请日期 2011.01.28
申请人 发明人
分类号 H01L21/8242;H01L21/768;H01L27/108 主分类号 H01L21/8242
代理机构 代理人
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