发明名称 Recoverable parity and residue error
摘要 An error recovery unit that may include error logic to detect an error in a dispatch port and timestamp logic configured to generate a timestamp for the error. The error recovery unit may also include check logic to determine if an instruction associated with the error has been retired based on the timestamp. If the instruction has been retired, a machine check error logic may be initiated. If the instruction has not been retired, an error correction logic may be initiated to recover the error and to re-execute the instruction. Thus, speculative errors may be recovered without the need for calling the machine check error, which is undesirable because of its catastrophic nature. Therefore, machine check errors may be significantly reduced.
申请公布号 US8909988(B2) 申请公布日期 2014.12.09
申请号 US201213436319 申请日期 2012.03.30
申请人 Intel Corporation 发明人 Sperber Zeev;Levy Ofer;Mishaeli Michael;Gabor Ron
分类号 G06F11/00 主分类号 G06F11/00
代理机构 Kenyon & Kenyon LLP 代理人 Kenyon & Kenyon LLP
主权项 1. An error recovery unit, comprising: error logic to detect an error in a dispatch port; timestamp logic to generate a timestamp for the error; checking logic to determine if an instruction associated with the error has been retired based on the timestamp, and if the instruction has been retired, the checking logic is to initiate a machine check error logic,if the instruction has not been retired, the checking logic is to initiate an error correction logic to recover the error and to re-execute the instruction.
地址 Santa Clara CA US