Silicon based nanoscale crossbar memory

摘要

The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials.

主权项

1. A crossbar memory array, comprising:
a first array of nanowires comprising a first material; a second array of nanowires comprising a second material oriented at an angle with respect to the first array of nanowires; a p-type silicon bearing material in direct contact with the first material; and a layer of non-crystalline silicon material disposed between the first material of a nanowire of the first array of nanowires and the second material of a nanowire of the second array of nanowires, and in direct contact with the p-type silicon bearing material, to form a resistive memory cell; wherein the non-crystalline silicon material comprises a plurality of defect sites, wherein at least some defect sites from the plurality of defect sites trap particles of the first material; wherein the particles of the first material form a filament within the layer of non-crystalline silicon material; and wherein the layer of non-crystalline silicon material and the p-type silicon bearing material provide a contact between the first material of the nanowire of the first array of nanowires and the second material of the nanowire of the second array of nanowires.