发明名称 |
Electronic device packages having bumps and methods of manufacturing the same |
摘要 |
An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip. |
申请公布号 |
US8907487(B2) |
申请公布日期 |
2014.12.09 |
申请号 |
US201213618813 |
申请日期 |
2012.09.14 |
申请人 |
SK Hynix Inc. |
发明人 |
Kim Seung Jee;Chung Qwan Ho;Nam Jong Hyun;Kim Si Han;Lee Sang Yong;Shin Seong Cheol |
分类号 |
H01L23/52 |
主分类号 |
H01L23/52 |
代理机构 |
William Park & Associates Patent Ltd. |
代理人 |
William Park & Associates Patent Ltd. |
主权项 |
1. An electronic device package comprising:
a semiconductor chip mounted on a bottom dielectric layer; a bump having a post disposed on a contact portion of the semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; a dielectric layer embedding the semiconductor chip and exposing the enlarged portion of the bump and an upper sidewall of the post; and an interconnection portion formed on the dielectric layer and having a locking portion and a connection portion, wherein the locking portion penetrates a portion of the dielectric layer to substantially surrounds the enlarged portion of the bump and the upper sidewall of the post and the connecting portion is formed on a surface of the dielectric layer and is extended from the locking portion to serve as a circuit interconnection line. |
地址 |
Gyeonggi-do KR |