Circuit to prevent load-induced non-linearity in operational amplifiers

摘要

Apparatus and methods for reducing load-induced non-linearity in amplifiers are provided. In certain implementations, an amplifier includes a current mirror, a buffer circuit, and an output stage. The buffer circuit can have a relatively high current gain and a voltage gain about equal to 1. The buffer circuit can amplify a mirrored current generated by the current mirror and provide the amplified mirrored current to the output stage, thereby helping to balance or equalize currents in the current mirror and avoiding the impact of load-induced offset error.

主权项

1. An amplifier comprising:
a current mirror configured to receive a differential input current corresponding to a difference between a first input current and a second input current, wherein the current mirror comprises a first current mirror transistor comprising a collector configured to receive at least a portion of the first input current, and wherein the current mirror further comprises a second current mirror transistor comprising a collector configured to receive at least a portion of the second input current and a base coupled to a base of the first current mirror transistor; an output terminal; an output circuit coupled to the output terminal and configured to generate a load current when the output terminal is coupled to a load, wherein the output circuit includes a first output transistor configured to control a magnitude of the load current at least in part; and a buffer circuit comprising:
a first buffer transistor comprising a base coupled to the collector of the second current mirror transistor; anda second buffer transistor comprising a base coupled to a base of the first output transistor and an emitter coupled to an emitter of the first buffer transistor, wherein the second buffer transistor further comprises a collector coupled to the base of the first output transistor and to the base of the second buffer transistor.