发明名称 Resistance change memory
摘要 A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a voltage to change a resistance of the memory element between first and second values reversibly. The rectifying element is a diode including an anode layer, a cathode layer and an insulating layer therebetween.
申请公布号 US8907318(B2) 申请公布日期 2014.12.09
申请号 US201213665681 申请日期 2012.10.31
申请人 Kabushiki Kaisha Toshiba 发明人 Sonehara Takeshi;Okamura Takayuki;Shigeoka Takashi;Kondo Masaki
分类号 H01L45/00;H01L29/868;G11C11/00;G11C13/00;H01L27/24;B82Y10/00;G11C13/02 主分类号 H01L45/00
代理机构 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A resistance change memory comprising: a first conductive line extending in a first direction; a second conductive line extending in a second direction which is crossed to the first direction; a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines; and a control circuit which is connected to both of the first and second conductive lines, wherein the control circuit is configured to control a voltage to change a resistance of the memory element between first and second values reversibly, wherein the rectifying element is a diode including a metal layer, an insulating layer, a first semiconductor layer and an intrinsic semiconductor layer, wherein the intrinsic semiconductor layer is sandwiched between the insulating layer and the first semiconductor layer, wherein the insulating layer is sandwiched between the metal layer and the intrinsic semiconductor layer, and wherein the first semiconductor layer is sandwiched between the intrinsic layer and an electrode layer.
地址 Tokyo JP