| 发明名称 | Data output circuit of semiconductor device | ||
| 摘要 | A data output circuit of a semiconductor device includes: a pattern data generation unit configured to generate pattern data in response to a bank selection signal, a variable delay unit configured to delay a source signal, which is generated in response to the bank selection signal, by a delay time corresponding to a delay control signal, a pattern control signal generation unit configured to generate a pattern control signal in response to an output signal of the variable delay unit, and a delay time control block configured to generate the delay control signal in response to the phases of the pattern control signal and the pattern data. | ||
| 申请公布号 | US8908451(B2) | 申请公布日期 | 2014.12.09 |
| 申请号 | US201213720805 | 申请日期 | 2012.12.19 |
| 申请人 | SK Hynix Inc. | 发明人 | Kim Jae Il |
| 分类号 | G11C7/00;G11C7/22;G11C7/10;G11C29/02 | 主分类号 | G11C7/00 |
| 代理机构 | William Park & Associates Patent Ltd. | 代理人 | William Park & Associates Patent Ltd. |
| 主权项 | 1. A data output circuit of a semiconductor device, comprising: a pattern data generation unit configured to generate pattern data in response to a bank selection signal; a variable delay unit configured to delay a source signal, which is generated in response to the bank selection signal, by a delay time corresponding to a delay control signal; a pattern control signal generation unit configured to generate a pattern control signal in response to an output signal of the variable delay unit; and a delay time control block configured to generate the delay control signal in response to the phases of the pattern control signal and the pattern data. | ||
| 地址 | Gyeonggi-do KR | ||