发明名称 |
Integrated circuit package |
摘要 |
An integrated circuit package includes a digital logic die disposed on a substrate; and an interposer die stacked vertically with the digital logic die on the substrate. The interposer die includes at least one vertical transistor configured to selectively provide electrical power to a portion of the digital logic die. |
申请公布号 |
US8907462(B2) |
申请公布日期 |
2014.12.09 |
申请号 |
US200912366234 |
申请日期 |
2009.02.05 |
申请人 |
Hewlett-Packard Development Company, L. P. |
发明人 |
Monchiero Matteo;Leverich Jacob B.;Ranganathan Parthasarathy;Jouppi Norman Paul;Talwar Vanish |
分类号 |
H01L23/06;H03K19/00;H01L25/065;H01L25/18;H01L23/36 |
主分类号 |
H01L23/06 |
代理机构 |
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代理人 |
|
主权项 |
1. An integrated circuit system comprising:
an interposer die comprising a plurality of sleep transistors; and a digital logic die stacked vertically with said interposer die, wherein said digital logic die comprises; a plurality of gated system elements, wherein a power supply to each of said gated system elements is independently gated by at least one of said sleep transistors in said interposer die, and a power manager module configured to selectively control said sleep transistors to selectively provide power to individual said gated system elements to manage power consumption in said system. |
地址 |
Houston TX US |