Divided central data processing

摘要

A circuit configuration for a data processing system and a corresponding method for executing multiple tasks by way of a central processing unit having a processing capacity assigned to the processing unit, the circuit configuration being configured to distribute the processing capacity of the processing unit uniformly among the respective tasks, and to process the respective tasks in time-offset fashion until they are respectively executed.

主权项

1. A circuit configuration for a data processing system for executing multiple tasks by way of a central processing unit having a processing capacity assigned to the processing unit, the circuit configuration configured to distribute the processing capacity of the processing unit among respective tasks uniformly and independently of a demand of the respective tasks, and to process the respective tasks, in time units resulting therefrom, time-offset fashion until they are respectively executed, the circuit configuration further being configured to allocate to each of the tasks a respective channel having its own registers, and to select the respective registers and connect them to the processing unit in accordance with an assignment of the respective task to the processing unit, and the circuit configuration further being configured to assign the processing unit respectively to each of the tasks for a constant time unit that is identical for all tasks.