Memory request ordering for a motion compensation process, implemented by a picture processing apparatus, a picture processing method, and a picture processing program

摘要

A picture processing apparatus is disclosed which includes: a memory; and a decoding circuit configured to decode encoded picture data; wherein the memory holds first and second fields of the decoded picture in different areas while holding field planes of a plurality of reference planes in different areas; the decoding circuit includes a motion compensation circuit configured to effect motion-compensating prediction by dividing into a plurality of divisions each of macro blocks making up the picture data in order to perform motion compensation in accordance with the motion-compensating prediction; and, upon transferring the decoded picture held in the memory during a motion compensation process, the compensation circuit rearranges transfer requests to at least either the same reference plane or the same field plane within a divided macro block on the basis of macro block division information and reference picture information, before transferring the rearranged transfer requests consecutively to the memory.

主权项

1. A picture processing apparatus comprising:
a memory; and a decoding circuit configured to decode encoded picture data through data exchange with said memory and to store a decoded picture in said memory; wherein said memory holds a first field and a second field of the decoded picture and holds a plurality of reference planes, and said decoding circuit includes a motion compensation circuit configured to:
effect motion-compensating prediction by performing a motion compensating process, in which:
the picture data comprises a plurality of macro blocks, anda given macro block of the plurality of macro blocks is divided into a plurality of divisions, with each of the plurality of reference planes being associated with at least one division of the plurality of divisions, andupon requesting transfer of data from the decoded picture held in said memory to said decoding circuit during the motion compensation process, controlling an order in which transfer requests to the memory are made for the given macro block on the basis of macro block division information and reference picture information such that the transfer requests are sorted into an order on the basis of at least one of (i) a reference plane to which requested divisions correspond and (ii) which of the first and second fields the requested divisions correspond.