Method for improving resist pattern peeling

摘要

A method of fabricating a mask is described. The method includes receiving receiving an integrated circuit (IC) design layout that has a first pattern layer including a first feature and has a second pattern layer including a second feature, wherein the first pattern layer and the second pattern layer are spatially related when formed in a substrate such that the first and second features are spaced a first distance between a first edge of the first feature and a second edge of the second feature, modifying the IC design layout by adjusting a dimension of the first feature based on the first distance, and generating a tape-out data from the modified IC design layout for mask making. The method further includes applying a logic operation (LOP) to the IC design layout.

主权项

1. A method of forming a resist pattern, the method comprising:
receiving a substrate having a material feature embedded in the substrate; depositing a resist film on the substrate and the material feature; and exposing the resist film according to a design pattern having a first feature to form the resist pattern overlaying the material feature on the substrate, wherein the first feature and the material feature are spaced a first distance between a first edge of the first feature and a second edge of the material feature in a top view, wherein the first feature has a dimension that is a function of the first distance; wherein the dimension of the first feature is increased by a first value when the first distance is larger than a first predetermined value.