发明名称 |
Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus |
摘要 |
A method of manufacturing a semiconductor device includes the steps of forming a gate electrode of a transistor on an insulator layer on a surface of a semiconductor substrate, forming an isolation region by performing ion implantation of an impurity of a first conductivity type into the semiconductor substrate, forming a lightly doped drain region by performing, after forming a mask pattern including an opening portion narrower than a width of the gate electrode on an upper layer of the gate electrode of the transistor, ion implantation of an impurity of a second conductivity type near the surface of the semiconductor substrate with the mask pattern as a mask, and forming a source region and a drain region of the transistor by performing ion implantation of an impurity of the second conductivity type into the semiconductor substrate after forming the gate electrode of the transistor. |
申请公布号 |
US8907375(B2) |
申请公布日期 |
2014.12.09 |
申请号 |
US201313853383 |
申请日期 |
2013.03.29 |
申请人 |
Sony Corporation |
发明人 |
Yanagita Masashi |
分类号 |
H01L29/74;H01L31/111;H01L31/0352;H01L27/146;H01L29/10;H01L31/103;H01L29/78 |
主分类号 |
H01L29/74 |
代理机构 |
Sheridan Ross P.C. |
代理人 |
Sheridan Ross P.C. |
主权项 |
1. A solid-state imaging device comprising:
a photoelectric conversion unit configured to store a signal charge according to incident light; and a semiconductor device including an isolation region which is an impurity region of a first conductivity type, a source region and a drain region of a transistor which are impurity regions of a second conductivity type, a gate electrode of the transistor which is provided on an insulator layer on a surface of a semiconductor substrate formed with the isolation region and the source region and the drain region of the transistor, and a lightly doped drain region of the second conductivity type which is provided near the surface of the semiconductor substrate in a region narrower than a width of the gate electrode of the transistor. |
地址 |
JP |