发明名称 Integrated circuit packaging system having dual sided connection and method of manufacture thereof
摘要 A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support over the substrate with the conductive support adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive support with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive support, and partially covering the pre-formed interposer.
申请公布号 US8906740(B2) 申请公布日期 2014.12.09
申请号 US201113085475 申请日期 2011.04.12
申请人 STATS ChipPAC Ltd. 发明人 Ko Chan Hoon;Park Soo-San;Kim YoungChul
分类号 H01L21/44;H01L21/48;H01L21/50;H01L25/10;H01L25/00;H01L23/48;H01L23/498;H01L23/00 主分类号 H01L21/44
代理机构 Ishimaru & Associates LLP 代理人 Ishimaru & Associates LLP
主权项 1. A method of manufacture of an integrated circuit packaging system comprising: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive post over the substrate with the conductive post adjacent to the integrated circuit; providing a pre-formed interposer, having an interposer through via and a pre-attached interconnect, with the pre-attached interconnect attached to the interposer through via; mounting the pre-formed interposer over the integrated circuit and the conductive post with the pre-attached interconnect over the device through via; and forming an encapsulation over the substrate covering the integrated circuit, the conductive post, and covering vertical edges of the pre-formed interposer.
地址 Singapore SG