| 摘要 |
PROBLEM TO BE SOLVED: To provide an FMA (floating point multiply and add operation, e.g., fused multiply-add operation) unit for carrying out an arithmetic operation in a model computation unit of a control unit.SOLUTION: The FMA unit, for carrying out an arithmetic operation in a model computation unit of a control unit, is configured to process input of two multiplicands and one augend in the form of floating point values, and provide a computation result of such processing as an output variable in the form of a floating point value. The FMA unit is designed to carry out a multiplication and a subsequent addition, the bit resolutions of the inputs corresponding to the multiplicands being lower than the bit resolution of the input corresponding to the augend and the bit resolution of the output variable. |
