发明名称 MULTICORE SYSTEM
摘要 PROBLEM TO BE SOLVED: To guarantee the achievement of both performance and safety by verifying the soundness of a CPU without switching operation modes.SOLUTION: Provided is a multicore system equipped with a plurality of Central Processing Units (CPUs), wherein a first CPU constituting the plurality of CPUs requests, upon calculating, by an arithmetic process, data needed for write to an external peripheral device, a write of data to the peripheral device by other one of the CPUs (a second CPU) than itself, and the second CPU writes the data received from the first CPU to the peripheral device and, after the write, requests a read of data from the peripheral device by the first CPU, then the first CPU reads out data from the peripheral device and compares the data calculated by the arithmetic process and the data read out from the peripheral device to determine the soundness of the second CPU on the basis of the result of comparison.
申请公布号 JP2014229198(A) 申请公布日期 2014.12.08
申请号 JP20130110109 申请日期 2013.05.24
申请人 KEIHIN CORP 发明人 NAKAYAMA KOTARO;ONO MASATO;SATO YUTAKA
分类号 G06F11/16;G06F11/18;G06F11/30 主分类号 G06F11/16
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