GATE CONTROL DEVICE OF SEMICONDUCTOR ELEMENT FOR ELECTRIC POWER

摘要

PROBLEM TO BE SOLVED: To provide a gate control device of an IEGT, capable of reducing total loss of both of the IEGT turned on and a diode facing the IEGT independently of an operation condition and capable of suppressing a peak current.SOLUTION: The gate control device is comprised of PWM control means 40 and gate driving means 10N. The PWM control means 40 gives delay time corresponding to a PWM signal and an output current value of an inverter to the gate driving means 10N. The gate driving means 10N is comprised of: first driving means for inputting the PWM signal; current detection means 15 for detecting a collector current of an IEGT; comparison means 16 which when the current reaches a threshold, outputs a trigger signal; delay means 17 which when the PWM signal is a turn-on signal, delays the trigger signal by delay time; second driving means for supplying a gate voltage to the IEGT by an output from the delay means 17; and combination means 14 composed of a plurality of resistors or a plurality of resistors and a diode and combines an output from the first driving means with an output from the second driving means.