MULTI-CHIP MODULE WITH STACKED FACE-DOWN CONNECTED DIES

摘要

A microelectronic assembly can include a substrate having first and second surfaces, at least two logic chips overlying the first surface, and a memory chip having a front surface with contacts thereon, the front surface of the memory chip confronting a rear surface of each logic chip. The substrate can have conductive structure thereon and terminals exposed at the second surface for connection with a component. Signal contacts of each logic chip can be directly electrically connected to signal contacts of the other logic chips through the conductive structure of the substrate for transfer of signals between the logic chips. The logic chips can be adapted to simultaneously execute a set of instructions of a given thread of a process. The contacts of the memory chip can be directly electrically connected to the signal contacts of at least one of the logic chips through the conductive structure of the substrate.

主权项

1. A method of fabricating a microelectronic assembly, comprising:
providing an interconnection substrate having a first surface, a second surface remote from the first surface in a vertical direction, conductive structure thereon, and terminals exposed at the second surface for connection with a component; electrically connecting signal contacts of at least two logic chips to one another through the conductive structure of the substrate for transfer of signals between the logic chips, the signals representing at least one of data or instructions, the logic chips being adapted to simultaneously execute a set of instructions of a given thread of a process, each logic chip having a front surface confronting the first surface of the interconnection substrate; and electrically connecting contacts exposed at a front surface of a memory chip to the signal contacts of at least one of the at least two logic chips through the conductive structure of the substrate, the front surface of the memory chip confronting the rear surface of each of the at least two logic chips.