I/O CELL ESD SYSTEM

摘要

An integrated circuit including an ESD network including a portion located in ESD subareas of a plurality of I/O cells where the ESD subareas are arranged in a row traversing the plurality of I/O cells. The ESD network includes ESD clamp cells and ESD trigger circuit cells wherein a portion of the network is located in the row. In some examples, the row includes an ESD trigger circuit cell with a portion in one subarea of one ESD subarea of one I/O cell and a second portion in a second ESD subarea of another I/O cell. Also described herein is a method for producing an integrated circuit layout with an ESD network.

主权项

1. A method of making an integrated circuit, the method comprising:
arranging a bank of I/O cells in an integrated circuit layout, the bank including a plurality of I/O cells, wherein each I/O cell of the plurality of I/O cells in the bank includes a designated ESD subarea, wherein the designated ESD subarea for each I/O cell of the plurality of I/O cells is aligned in a row traversing the plurality of I/O cells in a layout; after the arranging, placing in the layout a plurality of ESD clamp cells and at least one ESD trigger circuit cell for an ESD network in the row; manufacturing the integrated circuit as per the layout.