发明名称 |
CPU INSTRUCTION PROCESSING METHOD AND PROCESSOR |
摘要 |
The present invention relates to the field of computers. Provided are a CPU instruction processing method and a processor, allowing for conservation of register resources and reducing power consumption required for register reading/writing. The method is such that: when a result of a first instruction is used only once by a second instruction that follows the first instruction, an intermediate result of the first instruction and of the second instruction is not written back to a register stack, and a register that stores the intermediate result during a register-renaming stage is not renamed, that is, the register that stores the intermediate result is not mapped as a physical register. Embodiments of the present invention are for use in inter-instruction result transmission. |
申请公布号 |
WO2014190699(A1) |
申请公布日期 |
2014.12.04 |
申请号 |
WO2013CN88251 |
申请日期 |
2013.11.30 |
申请人 |
HUAWEI TECHNOLOGIES CO., LTD. |
发明人 |
ZHANG, LIXIN;ZHANG, LIUHANG;HOU, RUI;JIANG, ZHIYING |
分类号 |
G06F9/38;G06F9/48 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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