发明名称 IMPROVED LOW VOLTAGE WRITE SPEED BITCELL
摘要 <p>In low power CPUs, the best way to reduce power is to reduce supply voltage. Most low voltage memory arrays use an 8T cell, which has read stability immunity, in order to operate at low voltages. An embodiment of the disclosure determines when a write wordline (WWL) rises. If the determination shows that the WWL has risen, at least one of the plurality of p-channel field effect transistors (pFETS) is disconnected from a voltage supply, and the at least one plurality of n-channel field effect transistors (nFET) passe ate transistors are opened.</p>
申请公布号 EP2807649(A1) 申请公布日期 2014.12.03
申请号 EP20130706100 申请日期 2013.01.23
申请人 QUALCOMM INCORPORATED 发明人 PUCKETT, JOSHUA L.;GARG, MANISH;SHANKAR, HARISH
分类号 G11C11/412;G11C11/419 主分类号 G11C11/412
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