发明名称 ΔΣ変調器および信号処理システム
摘要 A ”£ modulator includes: a plurality of integrators cascaded to an input of an analog signal; a quantizer for quantizing an output signal of the integrator at a last stage and outputting a resultant digital signal; a DA converter for feedback for converting the digital signal obtained by the quantizer into an analog signal and supplying the analog signal to an input side of at least the integrator at a first stage; and an adder, arranged at an input stage side of the integrator at the last stage, for adding an output of the integrator at a preceding stage of the integrator at the last stage to at least one path signal supplied from at least another path via a first resistor having at least a first coefficient. The integrator at the last stage includes an operational amplifier, an integration capacitor, and a second resistor having a second coefficient.
申请公布号 JP5633398(B2) 申请公布日期 2014.12.03
申请号 JP20110017648 申请日期 2011.01.31
申请人 发明人
分类号 H03M3/02 主分类号 H03M3/02
代理机构 代理人
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