发明名称 アナログフィルタの帯域幅制御方法、帯域幅制御装置、および集積回路
摘要 A digital tuning system (250) for changing a cutoff frequency of an analog filter (132) includes digital synthesizers (292 and 294) for producing a two-tone calibration signal (196) applied to an input of the filter after a quality factor of the filter is increased. The filter includes at least one R/C circuit with two resistors (304 and 306) for changing the quality factor and arrays (308 and 310) of capacitors for changing the cutoff frequency. The amplitude of the magnitude responses (409 and 411) of the filter to each tone (405 and 407) is measured by a two discrete Fourier transform single-frequency bin power detection circuits (253 and 254) while the filter is sequenced through a plurality of capacitance settings. An optimal capacitance for the R/C circuit is selected by comparing, to a pre-selected value, a difference between the responses of the filter to each tone, for each capacitance setting.
申请公布号 JP5634713(B2) 申请公布日期 2014.12.03
申请号 JP20090533418 申请日期 2007.08.30
申请人 发明人
分类号 H03H11/04;H04B1/03;H04B1/16 主分类号 H03H11/04
代理机构 代理人
主权项
地址