| 摘要 |
<p>The planar or printed chip antenna (10) is configured to enhance the gain relative to its area. The antenna includes a dielectric substrate (12) having first and second opposing sides and a plurality of electrically conductive traces (18) thereon configured to define a half-loop antenna element (20) extending along an arcuate path on a first side of the dielectric substrate and having spaced apart first and second ends. First and second base strips (26, 28) are electrically connected together and aligned on the respective first and second opposing sides of the dielectric substrate adjacent the spaced apart first and second ends of the half-loop antenna element. A feed strip (32) is on the second side of the dielectric substrate and aligned with the first end of the half-loop antenna element and electrically connected thereto. At least one capacitive element (34, 36) is associated with the half-loop antenna element.</p> |
