| 发明名称 | Memory device and method for operating the same | ||
| 摘要 | A memory device includes a decoder circuit configured to activate a setting signal and a write signal if a setting command is applied when a reference mode is set; a delay circuit configured to delay and to generate a delayed write signal; and a setting circuit configured to perform a setting operation in response to the delayed write signal and an input signal of a predetermined pad at the time of setting of the reference mode and to perform the setting operation in response to the setting signal when the reference mode is not set. | ||
| 申请公布号 | US8902685(B2) | 申请公布日期 | 2014.12.02 |
| 申请号 | US201213716666 | 申请日期 | 2012.12.17 |
| 申请人 | SK Hynix Inc. | 发明人 | Song Choung-Ki |
| 分类号 | G11C7/00;G11C8/18;G11C11/4076;G11C7/10 | 主分类号 | G11C7/00 |
| 代理机构 | IP & T Group LLP | 代理人 | IP & T Group LLP |
| 主权项 | 1. A memory device comprising: a decoder circuit configured to activate a setting signal and a write signal if a setting command is applied when a reference mode is set; a delay circuit configured to delay and to generate a delayed write signal; and a setting circuit configured to perform a setting operation in response to the delayed write signal and an input signal of a predetermined pad when the reference mode is set, and configured to perform the setting operation in response to the setting signal when the reference mode is not set. | ||
| 地址 | Gyeonggi-do KR | ||