Method of fabricating resistance memory

摘要

A method of fabricating a variable resistance layer of a resistance memory is disclosed. The method includes placing a substrate in a sputtering chamber that has a copper target and a silicon oxide (SiO2) target or has a complex target made from copper and silicon oxide therein. Thereafter, a co-sputtering process is performed by using the copper target and the silicon oxide target, or a sputtering process is performed by using the complex target, so that a compound film is deposited on a surface of the substrate, wherein the compound film serves as a variable resistance layer of a resistance memory, and the mole percentage of Cu/(Cu+Si) of the compound film is 1-15%.

主权项

1. A method of fabricating a resistance memory, comprising:
placing a substrate in a sputtering chamber having a copper target and a silicon oxide target, wherein a lower electrode is formed on the substrate; performing a co-sputtering process by using the copper target and the silicon oxide target, so that a variable resistance layer is deposited on a surface of the lower electrode, wherein the variable resistance layer is a Cu—SiO2 layer and a mole percentage of Cu/(Cu+Si) of the Cu—SiO2 layer is 1-15%; and forming a upper electrode on the variable resistance layer.