RF digital spur reduction

摘要

Digital spur reduction in which spurs are kept outside selected channels of interest. An integrated radiofrequency transceiver circuit has digital and analogue components, the circuit includes a radiofrequency signal receiver having a local oscillator signal generator configured to provide a local oscillator signal at a frequency fLO and a mixer configured to combine an input radiofrequency signal with the local oscillator signal to produce an intermediate frequency signal; and a clock signal generator configured to generate a digital clock signal at a frequency fDIG for operation of the digital components, where the local oscillator signal and/or a reference signal from which the local oscillator signal is derived are generated such that digital spurs lie outside a band selected by the receiver.

主权项

1. An integrated Radio Frequency (RF) transceiver circuit having at least a digital component and at least an analog component, the circuit comprising:
a fixed frequency oscillator configured to generate a fixed frequency signal at a frequency fXTAL; a reference signal generator, coupled to the fixed frequency oscillator, that is configured to provide a reference signal at a reference frequency fREF from division of the fixed frequency signal; a local oscillator signal generator, coupled to the reference signal generator, that is configured to provide a local oscillator signal having a local oscillator signal frequency fLO from multiplication of the reference signal; a RF signal receiver including a mixer configured to combine an input RF signal with the local oscillator signal to produce an intermediate frequency signal; a filter having a filter bandwidth fifbw, the filter connected to an output of the mixer, wherein the reference signal generator is configured to generate the reference signal such that all harmonics of the reference signal lie outside of a selected band defined by the local oscillator signal frequency fLO and the filter bandwidth; and a digital clock signal generator, coupled to the local oscillator signal generator, that is configured to provide a digital clock signal at a digital clock signal frequency fDIG that is a sub-harmonic of the local oscillator signal frequency fLO.