RC extraction for multiple patterning layout design

摘要

Among other things, one or more systems and techniques for width bias adjustment for a design layout are provided. During fabrication, characteristics of a component can change, such as size, width, position, etc., from how a design layout represents such components. Accordingly, a width bias table is used to identify a width bias value that can be applied between a first polygon and a second polygon to compensate for a characteristic change associated with at least one of the first polygon and the second polygon during fabrication. The width bias value is used during RC extraction to determine an electrical characteristic adjustment, such as an additional capacitance or resistance associated with the width bias value, for at least one of the first polygon and the second polygon. In this way, RC extraction, during a design phase, can take into account electrical characteristic changes that occur during fabrication.

主权项

1. A method for width bias adjustment for a design layout, comprising:
receiving a design layout of an integrated circuit; identifying a first polygon having a first mask assignment within the design layout; identifying a second polygon having a second mask assignment within the design layout; identifying a width bias table based upon the first mask assignment and the second mask assignment; querying the width bias table using a first width between the first polygon and the second polygon to determine a width bias value; and applying the width bias value to the design layout, comprising:
determining an electrical characteristic adjustment for the first polygon based upon the width bias value; andtaking the electrical characteristic adjustment into account during an RC extraction stage for the design layout, at least some of the method implemented at least in part via a processing unit.