发明名称 Nonvolatile memory device manufacturing method
摘要 A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.
申请公布号 US8900965(B2) 申请公布日期 2014.12.02
申请号 US201213884630 申请日期 2012.03.21
申请人 Panasonic Corporation 发明人 Sorada Haruyuki;Mikawa Takumi;Tominaga Kenji;Tsuji Kiyotaka
分类号 H01L45/00;H01L27/24;H01L27/10 主分类号 H01L45/00
代理机构 Wenderoth, Lind & Ponack, LLP 代理人 Wenderoth, Lind & Ponack, LLP
主权项 1. A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, the method comprising: forming a plurality of first lines in a stripe pattern above a substrate; forming a first interlayer insulating layer above the first lines; forming a plurality of memory cell holes, each of which penetrates the first interlayer insulating layer and connects to one of the first lines; filling each of the memory cell holes with at least one electrode of a variable resistance element and a variable resistance layer of the variable resistance element; forming a second interlayer insulating layer above the first interlayer insulating layer, followed by forming a contact hole which penetrates the first interlayer insulating layer and the second interlayer insulating layer and connects to one of the first lines; forming a line groove which penetrates the second interlayer insulating layer, connects to the contact hole and the memory cell holes which are aligned, and extends in an alignment direction of the contact hole and the memory cell holes; forming a current steering layer of a bidirectional diode element above the first interlayer insulating layer, the second interlayer insulating layer, and the variable resistance layer to cover the line groove without covering a bottom surface of the contact hole; and forming (i) the bidirectional diode element which is connected to the variable resistance element and (ii) a contact plug for the contact hole by forming a second line inside the contact hole and the line groove, the second line including a lower layer which functions as an upper electrode of the bidirectional diode element and an upper layer comprising a line material, wherein in the forming of a current steering layer, the current steering layer is formed by sputtering a deposit material diagonally relative to a surface of the substrate in a direction parallel to an extending direction of the memory cell holes.
地址 Osaka JP