SENSE AMPLIFIER LOCAL FEEDBACK TO CONTROL BIT LINE VOLTAGE

摘要

Methods for precharging bit lines using closed-loop feedback are described. In one embodiment, a sense amplifier may include a bit line precharge circuit for setting a bit line to a read voltage prior to sensing a memory cell connected to the bit line. The bit line precharge circuit may include a first transistor in a source-follower configuration with a first gate and a first source node electrically coupled to the bit line. By applying local feedback from the first source node to the first gate, the bit line settling time may be reduced. In some cases, a first voltage applied to the first gate may be determined based on a first current drawn from the first bit line. Thus, the first voltage applied to the first gate may vary over time depending on the conductivity of a selected memory cell connected to the bit line.

主权项

1. A method for operating a non-volatile storage system, comprising:
connecting a first sense amplifier to a first bit line, the first bit line is connected to a first memory cell, the first sense amplifier includes a first precharge circuit, the first precharge circuit includes a first transistor, the first transistor includes a first gate and a first source node, the first source node is connected to the first bit line; precharging the first bit line to a first voltage using the first precharge circuit, the precharging the first bit line includes setting the first gate to a first bias voltage based on feedback from the first bit line; connecting a second sense amplifier to a second bit line, the second bit line is connected to a second memory cell, the second sense amplifier includes a second precharge circuit, the second precharge circuit includes a second transistor, the second transistor includes a second gate and a second source node, the second source node is connected to the second bit line; precharging the second bit line to the first voltage using the second precharge circuit, the precharging the second bit line includes setting the second gate to a second bias voltage based on feedback from the second bit line, the second bias voltage is different from the first bias voltage; sensing the first memory cell using the first sense amplifier subsequent to the precharging the first bit line; and sensing the second memory cell using the second sense amplifier subsequent to the precharging the second bit line.