发明名称 METHOD OF ASSEMBLING VCSEL CHIPS ON A SUB-MOUNT
摘要 The present invention relates to a method of assembling VCSEL chips (1) on a sub-mount (2). A de-wetting layer (13) is deposited on a connecting side of the VCSEL chips (1) which is to be connected to the sub-mount (2). A further de-wetting layer (13) is deposited on a connecting side of the sub-mount (2) which is to be connected to the VCSEL chips (1). The de-wetting layers (13) are deposited with a patterned design or are patterned after depositing to define connecting areas (21) on the sub-mount (2) and the VCSEL chips (1). A solder (15) is applied to the connecting areas (21) of at least one of the two connecting sides. The VCSEL chips (1) are placed on the sub-mount (2) and soldered to the sub-mount (2) to electrically and mechanically connect the VCSEL chips (1) and the sub-mount (2). With the proposed method a high alignment accuracy of the VCSEL chips (1) on the sub-mount (2) is achieved without time consuming measures.
申请公布号 US2014348192(A1) 申请公布日期 2014.11.27
申请号 US201214350404 申请日期 2012.10.08
申请人 KONINKLIJKE PHILIPS N.V. 发明人 Pruijmboom Armand;Dumoulin Raimond Louis;Miller Michael
分类号 H01S5/022;H01S5/028;H01S5/30;H01S5/024;H01S5/42 主分类号 H01S5/022
代理机构 代理人
主权项 1. A method of assembling VCSEL chips on a sub-mount comprising the following steps: forming p-type mesas by providing electrical p-contacts on top of the mesas, forming a n-type mesa by covering a mesa with an electrically isolating passivation layer overlapping at least over a p-n junction of the mesa, depositing a de-wetting layer on a connecting side of the VCSEL chips, depositing a further de-wetting layer on a connecting side of the sub-mount, said de-wetting layers being deposited with a patterned design or being patterned after deposition to define corresponding connecting areas on the sub-mount and the VCSEL chips which connecting areas provide a wetting surface for a solder, applying the solder to the connecting areas of at least one of the two connecting sides, placing the VCSEL chips on the sub-mount and soldering the VCSEL chips to the sub-mount without fixing the VCSEL chips relative to the sub-mount to allow a movement of the VCSEL chips on the sub-mount through surface tension forces of the melted solder, wherein the VCSEL chip comprises a bottom-emitter VCSEL array which is soldered with its mesa side to the sub-mount wherein prior to the deposition of the de-wetting layer on the connecting side of the VCSEL chips a first metal layer is deposited which is electrically connecting to the n-contacts of the VCSELs and overlapping the n-type mesa, said n-contacts forming a conducting network current equally over the p-type mesas, wherein a second metal layer is deposited at the same time as the first metal layer to overlap the p-type mesas and p-contacts, the first metal layer and the second metal layer mechanically stabilizing the VCSEL chips such that an electrical connection to the n-contact is at the same height as the p-contacts.
地址 EINDHOVEN NL