| 发明名称 |
MISCORRECTION DETECTION FOR ERROR CORRECTING CODES USING BIT RELIABILITIES |
| 摘要 |
Miscorrection detection for error correction codes using bit reliabilities is disclosed, including: receiving a plurality of reliabilities corresponding to respective ones of a plurality of read values; receiving one or more proposed corrections corresponding to one or more of the plurality of read values; and determining a miscorrection metric based at least in part on one or more of the plurality of reliabilities corresponding to the one or more of the plurality of read values. |
| 申请公布号 |
US2014351672(A1) |
申请公布日期 |
2014.11.27 |
| 申请号 |
US201414265249 |
申请日期 |
2014.04.29 |
| 申请人 |
SK hynix memory solutions inc. |
发明人 |
Marrow Marcus;Bellorado Jason;Wu Zheng;Kumar Naveen |
| 分类号 |
G06F11/10 |
主分类号 |
G06F11/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A system, comprising:
an error correction decoder configured to:
generate one or more proposed corrections corresponding to one or more of a plurality of read values, wherein the plurality of read values corresponds to a codeword; and a miscorrection detector configured to:
receive a plurality of reliabilities corresponding to respective ones of the plurality of read values;receive the one or more proposed corrections corresponding to the one or more of the plurality of read values; anddetermine a miscorrection metric based at least in part on one or more of the plurality of reliabilities corresponding to the one or more of the plurality of read values. |
| 地址 |
San Jose CA US |
