SINGLE COMPONENT SLEEP-CONVENTION LOGIC (SCL) MODULES

摘要

A multi-rail module having mutually exclusive outputs. The module includes first and second-rail logic circuits, first and second-rail driver circuits, and a PMOS transistor sourcing VDD to both the first and second driver circuits. The first-rail logic circuit is coupled to VDD and ground and has a first logic input and a first logic output. The second-rail logic circuit is coupled to VDD and ground and has a second logic input and a second logic output. The first-rail driver circuit is coupled to ground, receives the first logic output, and has a first-rail output Q1. The second-rail driver circuit is coupled to ground, receives the second logic output, and has a second-rail output Q0. The PMOS transistor has a gate driven by a SLEEP signal.

主权项

1. A multi-rail module having mutually exclusive outputs, the module comprising:
a first-rail logic circuit coupled to VDD and coupled to ground and having a first logic input and a first logic output; a second-rail logic circuit coupled to VDD and coupled to ground and having a second logic input and a second logic output; a first-rail driver circuit coupled to ground, receiving the first logic output, and having a first-rail output Q1; a second-rail driver circuit coupled to ground and receiving the second logic output and having a second-rail output Q0; and a PMOS transistor having a source coupled to VDD, a drain coupled to the first driver circuit and the second driver circuit, and a gate driven by a SLEEP signal; wherein when the SLEEP signal is low, the PMOS transistor sources VDD to the first driver circuit and the second driver circuit.