发明名称 |
CONTROLLER TO MANAGE NAND MEMORIES |
摘要 |
In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories. The virtualized ECC NAND controller allows the host processor to drive the stack of flash memory devices as a single NAND chip while the controller redirects the data to the selected NAND memory device in the stack. In various embodiments, a controller manages a plurality of NAND memory devices. The controller provides power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system. |
申请公布号 |
US2014351675(A1) |
申请公布日期 |
2014.11.27 |
申请号 |
US201414456559 |
申请日期 |
2014.08.11 |
申请人 |
Micron Technology, Inc. |
发明人 |
Tiziani Federico;Campardo Giovanni;Iaculo Massimo;Giaccio Claudio;Scognamiglio Manuela;Caraccio Danilo;Vitale Ornella;Pollio Antonino |
分类号 |
G06F11/10;G06F1/32;G06F12/02 |
主分类号 |
G06F11/10 |
代理机构 |
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代理人 |
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主权项 |
1. A controller, comprising:
a protocol interface circuit to exchange signals with a host processor; and a NAND interface coupled to the protocol interface circuit to manage a plurality of NAND memory devices, the NAND interface being configured to provide power to a select one of the plurality of NAND memory devices at a time to conserve overall power consumption of the storage system. |
地址 |
Boise ID US |