发明名称 |
METHODS AND APPARATUSES FOR STACKED DEVICE TESTING |
摘要 |
Various embodiments include apparatus, systems, and methods having multiple dies arranged in a stack in which the dies or a logic chip in communication with the dies stores a flag for indicating whether a threshold number of cells of the dies have failed during test operations. |
申请公布号 |
US2014347944(A1) |
申请公布日期 |
2014.11.27 |
申请号 |
US201313899818 |
申请日期 |
2013.05.22 |
申请人 |
Micron Technology, Inc. |
发明人 |
Lam Boon Hor;Montierth Dennis |
分类号 |
G11C29/04 |
主分类号 |
G11C29/04 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus comprising a logic die coupled with a plurality of memory dies, wherein the apparatus includes:
a plurality of address registers corresponding to a partition of a particular memory die of the plurality of memory dies, wherein each of the plurality of address registers is configured to store a respective failed address and repair plane information of the particular memory die; and a plurality of status registers corresponding to the plurality of address registers, wherein the status registers are configured to be set responsive to a fraction of the corresponding address registers are filled. |
地址 |
Boise ID US |