发明名称 シフトレジスタ及び表示装置
摘要 A unit circuit (11) includes: a transistor (T2) having its drain terminal to be supplied with a clock signal (CK) and its source terminal connected to an output terminal (OUT); a transistor (T9) which, when supplied with an active all-on control signal (AON), outputs an ON voltage to the output terminal (OUT), and which, when supplied with a nonactive all-on control signal (AONB), stops outputting the ON voltage; a transistor (T1) which supplies the ON voltage to a control terminal of the transistor (T2) in accordance with an input signal (IN); a transistor (T4) which, when supplied with the active all-on control signal (AON), supplies an OFF voltage to a control terminal of the transistor (T2). This makes it possible to provide a shift register of a simple structure that can prevent a malfunction from occurring after all-on operation, and to provide a display device.
申请公布号 JP5632001(B2) 申请公布日期 2014.11.26
申请号 JP20120531898 申请日期 2011.08.30
申请人 发明人
分类号 G11C19/28;G09G3/20;G09G3/36;G11C19/00 主分类号 G11C19/28
代理机构 代理人
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