发明名称 メモリモジュールおよびメモリシステム
摘要 PROBLEM TO BE SOLVED: To further reduce a size and improve waveform quality when constituting a module with a memory bus width of 32 bits according to the SO-DIMM standard. SOLUTION: A pin array of data signals of a DDR-SDRAM with a data bus width of 8 bits uses a pin array of a DDR-SDRAM with a data bus width of 16 bits, the pins of the former using the pins of the latter alternately. The 8-bit DDR-SDRAM is mounted as it is on an SO-DIMM in which wiring is formed for the 16-bit DDR-SDRAM. In a substrate and a connector, eight data lines are allocated to a point where 16 data lines are allocated in the case of the 16-bit DDR-SDRAM. Since a data strobe signal can handle two data blocks as one data block, one data strobe signal is bifurcated and connected on a memory control substrate. COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP5630348(B2) 申请公布日期 2014.11.26
申请号 JP20110061590 申请日期 2011.03.18
申请人 发明人
分类号 G06F12/06;G06F12/00 主分类号 G06F12/06
代理机构 代理人
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