Memory and process sharing across multiple chipsets via input/output with virtualization

摘要

Embodiments of the present invention provide an approach for memory and process sharing via input/output (I/O) with virtualization. Specifically, embodiments of the present invention provide a circuit design/system in which multiple chipsets are present that communicate with one another via a communications channel. Each chipset generally comprises a processor coupled to a memory unit. Moreover, each component has its own distinct/separate power supply. Pursuant to a communication and/or command exchange with a main controller, a processor of a particular chipset may disengage a memory unit coupled thereto, and then access a memory unit of another chipset (e.g., coupled to another processer in the system). Among other things, such an inventive configuration reduces memory leakage and enhances overall performance and/or efficiency of the system.

主权项

1. A circuit having multiple chipsets, comprising:
a first chipset having a first processor and a first memory unit, the first memory unit being associated with a first power supply; a second chipset having a second processor and a second memory unit, the second memory unit being associated with a second power supply; and a communication channel coupling the first chipset to the second chipset, wherein the first processor is configured to disengage the first power supply associated with the first memory unit and to access the second memory unit, and wherein the second processor is configured to disengage the second power supply associated with the second memory unit and to access the first memory unit.