| 发明名称 | Test apparatus with voltage margin test | ||
| 摘要 | A pattern generator generates a pattern signal which represents a test signal to be supplied to a DUT. A driver generates a test signal having a level that corresponds to the pattern signal, and outputs the test signal thus generated to the DUT. A voltage modulator changes, in a predetermined voltage range, the voltage level of the test signal output from the driver DR. | ||
| 申请公布号 | US8896332(B2) | 申请公布日期 | 2014.11.25 |
| 申请号 | US201113316373 | 申请日期 | 2011.12.09 |
| 申请人 | Advantest Corporation | 发明人 | Ishida Masahiro;Watanabe Daisuke;Okayasu Toshiyuki;Ichiyama Kiyotaka |
| 分类号 | G01R31/00;G01R31/26 | 主分类号 | G01R31/00 |
| 代理机构 | Ladas & Parry, LLP | 代理人 | Ladas & Parry, LLP |
| 主权项 | 1. A test apparatus configured to supply a test signal to a device under test, the test apparatus comprising: a pattern generator configured to generate a pattern signal which represents a test signal to be supplied to the device under test; a driver configured to generate the test signal and to output the test signal thus generated to the device under test, the test signal changing between at least two voltage levels based on said pattern signal; and a voltage modulator configured to change each of the voltage levels of the test signal within a respective predetermined voltage range to test a voltage margin of the device under test. | ||
| 地址 | Tokyo JP | ||