| 发明名称 | Semiconductor device and manufacturing method for the same | ||
| 摘要 | A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad. | ||
| 申请公布号 | US8896129(B2) | 申请公布日期 | 2014.11.25 |
| 申请号 | US201313767940 | 申请日期 | 2013.02.15 |
| 申请人 | Renesas Electronics Corporation | 发明人 | Mori Ryo;Fukuoka Kazuki;Morino Naozumi;Deguchi Yoshinori |
| 分类号 | H01L23/48;H01L23/00;H01L21/02;H01L23/538 | 主分类号 | H01L23/48 |
| 代理机构 | Miles & Stockbridge P.C. | 代理人 | Miles & Stockbridge P.C. |
| 主权项 | 1. A semiconductor device comprising: a substrate including a first circuit region, a first circuit element being formed in the first circuit region; a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated; and an electrode pad that is formed on the multilayer wiring layer, wherein an interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in a region in which the electrode pad and the first circuit region overlap each other in a planar view of the electrode pad, wherein the substrate further includes a second circuit region where a second circuit element is formed that is less susceptible to stress as compared to the first circuit element, and wherein the electrode pad overlaps the first circuit region and the second circuit region in the planar view of the electrode pad. | ||
| 地址 | Kawasaki-shi JP | ||