Memory system having a plurality of serially connected devices

摘要

A semiconductor memory device and system are disclosed. The memory device includes a memory, a plurality of inputs, and a device identification register for storing register bits that distinguish the memory device from other possible memory devices. Circuitry for comparing identification bits in the information signal with the register bits provides positive or negative indication as to whether the identification bits match the register bits. If the indication is positive, then the memory device is configured to respond as having been selected by a controller. If the indication is negative, then the memory device is configured to respond as having not been selected by the controller. A plurality of outputs release a set of output signals towards a next device.

主权项

1. A system comprising:
a first semiconductor device; and a second semiconductor device including first and second data strobe pins, the second semiconductor device being a memory device, and the first semiconductor device being configured to output a first data strobe signal providing synchronous reference for input data to be received by the second semiconductor device via the first data strobe pin, and the second semiconductor device configured to output, via the second data strobe pin, a second data strobe signal providing synchronous reference for output data, and wherein the first and second data strobes are both intermittently driven timing signals.