发明名称 |
Successive approximation analog-to-digital converter using capacitor array with sub-capacitors configured by capacitor disassembling and related method thereof |
摘要 |
A successive approximation analog-to-digital converter (SAR ADC) includes a capacitor array and a comparator. The capacitor array has M capacitors which are arranged to perform capacitor switching operations sequentially, wherein a sum of capacitance values of the M capacitors is equal to (2N−1) unit capacitors, M>N, and M and N are both positive integers. The comparator is arranged for comparing an output of the capacitor array and an analog input sequentially. |
申请公布号 |
US8896478(B2) |
申请公布日期 |
2014.11.25 |
申请号 |
US201313959722 |
申请日期 |
2013.08.05 |
申请人 |
Realtek Semiconductor Corp. |
发明人 |
Tsai Jen-Huan;Huang Po-Chiun |
分类号 |
H03M1/12;H03M1/06;H03M1/46 |
主分类号 |
H03M1/12 |
代理机构 |
|
代理人 |
Hsu Winston;Margo Scott |
主权项 |
1. A successive approximation analog-to-digital converter (SAR ADC), comprising:
a capacitor array, comprising M capacitors arranged to perform capacitor switching operations sequentially, wherein a sum of capacitance values of the M capacitors is equal to (2N−1) unit capacitors, M>N, and M and N are both positive integers; and a sum of capacitance values of a plurality of specific capacitors among the M capacitors is equal to 2k unit capacitors, where K is a positive integer and K<N; and a comparator, arranged for comparing an output of the capacitor array and an analog input sequentially. |
地址 |
Science Park, HsinChu TW |