Split Gate NAND Flash Memory Structure And Array, Method Of Programming, Erasing And Reading Thereof, And Method Of Manufacturing

摘要

A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type in the substrate with a second region of the second conductivity type in the substrate, spaced apart from the first region. A continuous first channel region is defined between the first region and the second region. A plurality of floating gates are spaced apart from one another with each positioned over a separate portion of the channel region. A plurality of control gates are provided with each associated with and adjacent to a floating gate. Each control gate has two portions: a first portion over a portion of the channel region and a second portion over the associated floating gate and capacitively coupled thereto.

主权项

1. A method of erasing a plurality of flash memory cells in a flash memory structure formed in a semiconductor substrate of a first conductivity type wherein said structure has a first region of a second conductivity type in said substrate; a second region of a second conductivity type in said substrate, spaced apart from said first region, thereby defining a continuous first channel region therebetween; a plurality of floating gates, spaced apart from one another, each positioned over a separate portion of the channel region, wherein each floating gate defines a flash memory cell; a plurality of control gates, each associated with and adjacent to a floating gate, each control gate having two portions: a first portion over a portion of the channel region and a second portion over the associated floating gate and capacitively coupled thereto; wherein said method comprising:
applying a positive voltage said substrate; applying a voltage to each of said control gates, where said voltage applied to said control gates is less than said positive voltage; thereby causing tunneling of electrons from said floating gates to said substrate.