SAMPLER CIRCUIT FOR A DECISION FEEDBACK EQUALIZER AND METHOD OF USE THREOF

摘要

A sampler circuit for a decision feedback equalizer and a method of use thereof. One embodiment of the sampler circuit includes: (1) a first sampler portion including a series-coupled first master regeneration latch and first slave latch, (2) a second sampler portion including a series-coupled second master regeneration latch and second slave latch, and (3) a first feedback circuit coupled to a first node between the first master regeneration latch and the first slave latch and operable to provide a feedback signal to the second master regeneration latch to cause a bias charge to be built up therefor.

主权项

1. A sampler for sampling an input signal state, comprising:
a first sampler portion including a series-coupled first master regeneration latch and first slave latch; a second sampler portion including a series-coupled second master regeneration latch and second slave latch; and a first feedback circuit coupled to a first node between said first master regeneration latch and said first slave latch and operable to provide a feedback signal to said second master regeneration latch to cause a bias charge to be built up therefor.