| 摘要 |
<p>A data processing apparatus maps data symbols received from a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol into an output data stream. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit. A generator polynomial for the linear feedback shift register of R i ¹ 13 = R i - 1 ¹ 0 Š• R i - 1 ¹ 1 Š• R i - 1 ¹ 2 Š• R i - 1 ¹ 12 is provided with a permutation order which has been established by simulation analysis to optimise communication performance via typical radio channels, of an OFDM modulated system such as a Digital Video Broadcasting (DVB) standard such as DVB-Terrestrial2 (DVB-T2).</p> |
