发明名称 Digital phase-locked loop device with automatic frequency range selection
摘要 <p>A digital phase-locked loop (PLL) device includes a digital loop filter (106) which is provided with both a VCO-loop output and a DCO-loop output. The VCO-loop output is connected to an analog input of a multiband voltage-controlled oscillator (VCO) module (100) for allowing usual operation of the PLL with a direct voltage acting as feedback parameter. The DCO-loop output is connected to a digital control input of the multiband VCO module for allowing automatic frequency range selection. A code value which is produced by the digital loop filter acts as feedback parameter during the frequency range selection. Rapid and precise range selection can thus be performed.</p>
申请公布号 EP2804324(A1) 申请公布日期 2014.11.19
申请号 EP20130305613 申请日期 2013.05.15
申请人 ASAHI KASEI MICRODEVICES CORPORATION 发明人 CANARD, DAVID;CHARPENTIER, SÉBASTIEN;LECUYER, MATTHIEU
分类号 H03L7/099;H03L7/10 主分类号 H03L7/099
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