发明名称 フォーカス制御回路
摘要 A first terminal supplies the bias voltage to a high-potential-side input terminal of a hall element. A second terminal supplies the ground potential to a low-potential-side input terminal of the hall element. A P-channel type transistor is configured such that the source terminal is connected to the power supply potential and the drain terminal is connected to the first terminal. An operational amplifier differentially amplifies the voltage between a predetermined set voltage and the voltage at the first terminal so as to control the gate voltage of the P-channel type transistor.
申请公布号 JP5626967(B2) 申请公布日期 2014.11.19
申请号 JP20100127596 申请日期 2010.06.03
申请人 发明人
分类号 G01D5/14;G01R33/07 主分类号 G01D5/14
代理机构 代理人
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