发明名称 半導体装置の製造方法
摘要 <p>A semiconductor manufacturing method includes exposing on a photoresist film a first partial pattern of a contact hole, overlapping a part of a gate interconnection in alignment with an alignment mark formed simultaneously with forming the gate interconnection, exposing on the photoresist film a second partial pattern, overlapping a part of an active region in alignment with an alignment mark formed simultaneously with forming the active region, developing the photoresist film to form an opening at the portion where the first partial pattern and the second partial pattern have been exposed, and etching an insulation film to form a contact hole down to the gate interconnection and the source/drain diffused layer.</p>
申请公布号 JP5626016(B2) 申请公布日期 2014.11.19
申请号 JP20110042675 申请日期 2011.02.28
申请人 发明人
分类号 H01L21/8244;H01L21/768;H01L27/10;H01L27/11 主分类号 H01L21/8244
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